Broadcast Equipment2026-10-14·9 min read

Headend Core: IRD, Multiplexer and CAS/SMS Chain

The headend core in three stages: locked feeds in, one ordered transport stream out, and the PID, scrambling and entitlement rows that decide the chassis. Each model named in this article is one of 190 in the Hanxing catalogue, published with its own specifications and datasheet.

IP

Hanxing Team

Broadcast & IPTV Experts

The path this guide walks

  1. Feedssatellite, terrestrial, cable and IP services arrive at the plant
  2. Turn-arounda receiver or gateway locks each carrier and clears what is licensed
  3. Multiplexservices are selected, PIDs remapped and the PSI/SI tables rebuilt
  4. Scramblethe CAS keys are applied inside the multiplexer or the modulator
  5. Controlthe SMS holds the subscriber records and writes the entitlement
  6. Distributethe finished line-up leaves as carriers, or as multicast

The core ends where distribution begins: modulation, transmission and the room devices sit behind it, and the dish and antennas ahead of it are reception.

A headend core runs three jobs in sequence: it locks and clears the feeds the site receives, it selects and re-labels the services, and it decides which of those services a subscriber is allowed to watch. Everything before it delivers signals into the plant; everything after it delivers them out. This guide walks the middle of the chain — the turn-around receivers, the multiplexers and scramblers, and the conditional access and subscriber management — and names the published rows that settle each decision, from a 2-tuner demodulator in a 482mm×328mm×44mm chassis to a 512-PID multiplexer.

What Is the Headend Core?

The headend core is the middle of a digital TV headend: the stage that takes feeds already locked by tuners or gateways, turns them into one ordered transport stream, applies the tables and the scrambling the receivers expect, and hands that stream to the modulation or multicast stage. It is hardware plus the CAS and SMS software that control it.

Turn-around clears and republishes what arrives; multiplexing and scrambling build the line-up and protect it; control decides who is entitled to see it. The modulation and the transmitter behind it are distribution, and the dish, the LNB and the antennas ahead of it are reception.

What Are the Stages of a Headend Core?

Five stages sit between the dish and the transmitter, and only two of them are chassis you buy in multiples. Turn-around and multiplexing are the hardware; scrambling is normally built into one of those chassis; control is software; and monitoring proves the stream before it leaves the rack.

StageJob in the coreInterfacesPublished examples
Turn-aroundLock one carrier per tuner, clear what is licensed, republish each servicetuner in, ASI or IP outFUQ3904C 4 tuner inputs; FUQ4696 8 tuner inputs, 1 MPTS and 16 SPTS
MultiplexSelect services, re-map PIDs, rebuild PSI/SI, insert guide and CA dataASI, IP or tuner in, ASI or IP outFUQ3514 4 ASI and 128 IP inputs into 4 MPTS; FUQ4214 512 IP inputs
ScrambleApply CSA scrambling to the services the CAS keysinside the multiplexer or the modulatorETR289, ETSI 101 197, ETSI 103 197 published on the FUQ3514 and FUQ200B
ControlAccounts, entitlement and authorisationIP or API with the CAS and SMSFUQ-1.0 CAS, FUQ-SMS platform
MonitorProve the stream before it leaves the rackASI and RF in, USB 2.0 to a PCFUQ-XB 1 ASI and 1 RF (DVB-C) input, 160Mbps real-time

Two of those stages carry the model decisions, and each has its own guide: the reception and decoding side in the professional IRD and decoder guide, and the line-up side in the transport stream multiplexer guide.

How Does the Turn-Around Stage Lock and Clear the Feeds?

A turn-around stage locks each transponder or carrier on its own tuner, clears the services it is licensed to clear, and republishes them as transport streams over ASI or IP. One tuner locks one carrier, so the published tuner count decides how many feeds a chassis can take, and the descrambling row decides which of them can be cleared.

The FUQ3904C receiver card publishes 4 tuner inputs across DVB-S/S2/S2X with 5 MPTS outputs in a 482mm×328mm×44mm chassis drawing ≤40W. The FUQ4696 CI receiver publishes 8 tuner inputs with CAM/CI slots or BISS descrambling, and outputs 1 ASI plus 1 MPTS and 16 SPTS over IP. Where feeds only pass through, the FUQ3902B demodulator publishes 2 tuner inputs across 950-2150MHz, CAM/CI or BISS descrambling, and re-multiplexing of up to 32 channels into one MPTS feeding 32 IP stream outputs over UDP/RTP, with 256 PIDs of remapping per input channel.

The FUQ41086D adds Dual Mode BISS decryption and DiSEqC control to its 8 tuner inputs, which matters where the dish farm has to be switched as well as locked. Which mechanism applies — a CAM in a CI slot, BISS Mode 1 or BISS Mode E — is set out device by device in the professional IRD and decoder guide, and the range is grouped on the IRD, decoder and transcoder page.

FUQ3902B satellite demodulator and descrambler with CAM/CI slots and IP output in the turn-around stage of a headend core
FUQ3902B satellite demodulator and descrambler with CAM/CI slots and IP output in the turn-around stage of a headend core

How Does the Multiplex Stage Decide What Goes Out?

The multiplex stage is where a list of feeds becomes a line-up. It drops the services the site does not carry, re-maps the PIDs so that nothing collides, regenerates the PSI/SI tables the receivers read, and inserts guide and conditional-access data. The published PID ceiling is what limits how many services one chassis can hold.

The FUQ3514 multiplexer-scrambler publishes 4 ASI inputs, 128 IP inputs and 4 MPTS outputs with a ceiling of 512 PIDs per channel. The FUQ4214 takes 512 IP inputs over UDP in SPTS or MPTS and returns 2 independent ASI output channels of up to 210Mbps plus 2 IP outputs of up to 230Mbps, with EPG, CA and data insertion in the same pass.

Published chassisInputsOutputsPID row
FUQ35144 ASI, 128 IP4 MPTS512 PIDs per channel
FUQ4823C-28 ASI, 64 IPASI and IP over UDP512 output PIDs, output range 0x0000—0x1FFF
FUQ35044 ASI, 768 UDP/RTP IP4 MPTS748 PID numbers for GE1, 204/188 packet adaptation
FUQ4214512 IP over UDP, 2 ASI2×2 ASI ports to 210Mbps, 2 IP outputs to 230MbpsPID re-mapping with EPG and CA insertion
FUQ4823C4 tuner inputs, DVB-S/S2/S2X5 MPTS, 4 bypassed plus 1 multiplexedPID re-mapping, signal strength -65 ~ -25dBm
FUQ4216B12 ASI2 IP outputs over UDPPSI/SI table editing and IIP packet generation

Where the multiplexer has to lock the feeds itself and save a chassis, the FUQ4218K publishes 16 tuner inputs configurable for DVB-S/S2/S2X, DVB-C/T, ISDB-T or ATSC plus 2 ASI inputs into 4 IP (MPTS) outputs with BISS descrambling. The leg between one stage and the next is a design decision rather than a preference: ASI carries a transport stream on coax inside the rack, IP carries it on Ethernet, and the conversion between the two is covered in the DVB to IP gateway guide. The range is listed on the multiplexer and scrambler page.

FUQ4218K multiplexer taking 16 tuner inputs and 2 ASI inputs into four IP outputs in the multiplex stage of a headend core
FUQ4218K multiplexer taking 16 tuner inputs and 2 ASI inputs into four IP outputs in the multiplex stage of a headend core

Where Do CAS and SMS Sit in the Chain?

Scrambling itself happens inside the multiplexer or the modulator; the keys and the rights sit in the conditional access system, and the subscriber records sit in the SMS. The two have to agree on one subscriber record, or a paying viewer is locked out while a cancelled account keeps watching.

The scrambling our chassis publish is the DVB common scrambling algorithm, and the standard rows read ETR289, ETSI 101 197 and ETSI 103 197 — printed on the FUQ3514, on the FUQ200B, and on the FUQ4427, whose page also publishes up to 512 IP inputs, 16 non-adjacent carriers and 180 PIDs per channel. On the software side, the FUQ-1.0 is published as the Ensurity conditional access system with an SMS app issued in April 2020, DVB standards support and remote authorisation, and the FUQ-SMS platform is published for million-level user bases with CAS-compatible interfaces, entitlement data distributed in batches, SMS-based mobile charging and a modular C/S architecture.

The split of duties between the scrambling hardware and the entitlement platform is worked through in the CAS and SMS guide, and the platforms are grouped on the software and systems page.

Which Published Rows Decide the Rack?

A headend core is bought for a rack, so three rows are read before the order: the chassis size, the weight, and the consumption the power budget has to carry. All three are published per model, and they differ inside the same function: a 44mm-high 1U chassis is the shape of the range, the footprint and the load are not.

Published chassisChassis size (W×L×H)WeightConsumption
FUQ3904C482mm×328mm×44mm3.5kg≤40W
FUQ3902B482mm×328mm×44mmnot published on the pagenot published on the page
FUQ3514482mm×300mm×44mm3.5kg≤40W
FUQ4823C-2482mm×300mm×44mm3.5kgnot published on the page
FUQ4214482mmx410mmx44mm2.0kg<25w
FUQ4455A420mm×440mm×44.5mmnot published on the pagenot published on the page

The environment rows are consistent: 0~45℃ in operation and -20~80℃ in storage are published on the FUQ3904C, the FUQ3514, the FUQ4214 and the FUQ4823C-2, and the same dual AC input, AC 110V±10%, 50/60Hz Or AC 220V±10%, 50/60Hz, is published on the FUQ3904C and the FUQ4823C-2. Where a page does not print a weight or a consumption figure, we confirm it against the unit we build.

FUQ4823C-2 multiplexer and scrambler, front and rear panels, in a headend core rack
FUQ4823C-2 multiplexer and scrambler, front and rear panels, in a headend core rack

How Do You Prove the Stream Before It Leaves the Core?

Monitoring belongs inside the core, not after it, because a fault found on the ASI leg is a five-minute correction while the same fault at the transmitter is an outage. The FUQ-XB transport stream analyzer publishes 1 ASI and 1 RF (DVB-C) input, real-time TS analysis at 160Mbps and offline capture up to 120Mbps, in a 160mm×114mm×33mm USB 2.0 housing.

What Goes Wrong in a Headend Core?

Most core faults are configuration rather than hardware, and each one has a published row that can be checked before the rack is closed. Every item below is cheaper to catch during commissioning than after the plant is on air.

  • Two services carrying the same PID. A re-mux that remaps PIDs automatically avoids it; a manual table does not, and the receiver drops the second service.
  • A PSI/SI table that was never regenerated. The line-up changes, the table does not, and the televisions keep the old channel names — automatic PSI/SI generation is a specification question, not a software update.
  • A bit rate larger than the carrier can hold. An 8MHz DVB-C carrier at 256QAM holds about 38Mbps, so a line-up of 4Mbps services is not the same plan as one at 8Mbps.
  • An entitlement that never reached the subscriber. Scrambling without a working SMS leaves the operator unable to authorise or cancel, which is why the standard rows and the platform are quoted as one system.

What Should You Send for a Headend Core Quotation?

Send the traffic first, not the model numbers, because the numbers that decide the chain are the ones only the site knows. A request that can be answered without a second round of questions carries the feeds, the encryption, the service count, the output and the rack.

  • How many carriers or transponders must be locked at once, and in which standard — DVB-S/S2/S2X, DVB-C, DVB-T/T2, ATSC or ISDB-T.
  • Which feeds are encrypted and under which system, because a CAM in a CI slot and a BISS key call for different receivers.
  • How many services the final line-up carries, and whether the site needs one MPTS or a set of SPTS.
  • Whether the output is coax carriers, multicast on the site network, or both.
  • Whether subscribers are sold to, which decides the CAS and SMS scope.
  • Rack space, power and the environment the plant room actually has.

We build in Guangzhou and quote factory-direct: standard chassis per unit, and custom branding, packaging or software minimums confirmed with the quotation. Send the site facts through the contact form and we reply with the model list for each stage, the datasheet for the exact chassis, and a quotation. The commercial questions are answered on the FAQ page, the chains are grouped by deployment on the solutions pages, and the stage-by-stage detail behind these rows is in the transport stream multiplexer guide.

Frequently Asked Questions

What is a headend core?

The headend core is the receive-to-scramble segment of a digital TV headend: the receiver or turn-around stage that locks and clears the incoming feeds, the multiplexers that build the line-up and its PSI/SI tables, and the conditional access system and SMS that control entitlement. Modulation, transmission and the room devices sit outside it.

How many feeds can one turn-around chassis take?

It follows the published tuner count, because one tuner locks one carrier: 2 tuner inputs on the FUQ3902B, 4 on the FUQ3904C, 8 on the FUQ4696 and the FUQ41086D, 16 on the FUQ4218K and 24 on the FUQ4619C-3. Several services can share one output carrier, so the tuner count sets how many feeds are taken, not how many channels are carried.

How many services can one multiplexer carry?

The pages publish the PID ceiling that sets it: 512 PIDs per channel on the FUQ3514, 512 output PIDs on the FUQ4823C-2, 748 PID numbers for GE1 on the FUQ3504, 256 per channel on the FUQ4455A and the FUQ200B, and 180 per channel on the FUQ4427. The service count also depends on the bit rate each service is encoded at.

Do you need both a conditional access system and an SMS?

Where content is sold or restricted, yes. The scrambling is applied by the multiplexer or the modulator, the conditional access system holds the keys and the rights, and the SMS holds the subscriber records and entitlement. The FUQ-1.0 is the CAS and the FUQ-SMS the platform; without the SMS an operator cannot authorise or cancel a subscriber.

Which scrambling standard do the headend chassis publish?

The scramble standard row reads ETR289, ETSI 101 197 and ETSI 103 197 on the FUQ3514, the FUQ4427, and the FUQ200A, FUQ200B, FUQ200E and FUQ200F QAM processors. The scrambled transport stream still has to be keyed by a conditional access system whose modules the receivers support in the field.

Can a multiplexer take tuner inputs directly and save a chassis?

Yes. The FUQ4218K publishes 16 tuner inputs configurable for DVB-S/S2/S2X, DVB-C/T, ISDB-T or ATSC plus 2 ASI inputs into 4 IP (MPTS) outputs with BISS descrambling, and the FUQ4823C publishes 4 tuner inputs into 5 MPTS streams, 4 bypassed plus 1 multiplexed. That removes a separate receiver stage and one ASI or IP hop.

How much rack space and power does a headend core need?

The published chassis are 44mm high and the rows we print read 3.5kg and ≤40W on the FUQ3904C and FUQ3514, 2.0kg and <25w on the FUQ4214, and 4.8kg and 20W on the FUQ4359 transcoder, with 0~45℃ in operation and -20~80℃ in storage. Any row a page does not print is confirmed against the unit we build.

What does a headend core cost?

There is no list price, because the configuration is the price: the tuner count, the PID ceiling, the amount of scrambling and the CAS and SMS scope all move the number. Standard chassis are quoted per unit and we quote factory-direct, per project; custom branding, packaging or software minimums and their schedule are confirmed with the quotation.

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Talk to the headend engineers before you specify

Send the model number you are looking at — or the channel count and the input and output formats you work with — and we answer with the datasheet, the configuration and a written price. The reply comes from the headend team in Guangzhou, not a sales line.

Talk to the factory before you specify

Send the model number — or the channel count and the input/output formats — and we answer with the datasheet, the configuration and a written quotation.